1. Field of the Invention
The invention relates generally to the sampling of digital information to produce pulse width modulated signals, and more particularly, to an apparatus and method for producing pulse width modulated signals in response to multiple bit samples of digital information.
2. Description of the Related Art
The use of multiple bit samples of digital information to produce pulse width modulated signals is well known. Referring to the illustrative drawing of FIG. 1, for example, there is shown a typical earlier apparatus 20 for producing a pulse width modulated (PWM) signal.
In FIG. 2 there is shown an exemplary PWM signal train 22. The period of the PWM signal is T. The three pulses 24, 26 and 28 shown for the PWM signal train 22 have different pulse-widths, T, T/2 and T/4, respectively.
The pulse widths of the signal 22, for example, can be modulated in response to the contents of the 8-bit latch 30 of the apparatus 20. More specifically, an 8-bit sample can be loaded into the 8-bit latch 30 via line 32. The contents of the 8-bit latch 30 then can be observed via line 34 by a match detector 36. Eight system clock signals are produced by clocks 1-8 on line 38. The match detector 36 compares the contents of the 8-bit latch 30 with the system clock signals on line 38. When the match detector 36 detects a match between each bit in the 8-bit latch 30 and corresponding bits produced on line 38, it causes a PWM signal on line 40 to transition from a logical zero state to a logical one state.
The clock frequencies of clocks 1-8 are scaled such that clock 1 goes through 256 ticks for every 32 ticks by clock 4 and for every 2 ticks by clock 8. In effect, the system clocks 1-8 act as a binary counter that counts successively from 00000000 (0) to 11111111 (255.sub.10). Thus, two hundred and fifty-six ticks of clock 1 are required to complete the count. The count repeats for each successive 8-bit sample.
For each tick of clock 1, a different combination of multiple bits is provided on line 38. The match detector 36 performs a bit by bit comparison of each bit of each such combination with corresponding bits stored in the 8-bit latch 30. The width of the pulse during each period of the PWM signal depends upon the contents of the 8-bit latch 30. For example, when the contents of the 8-bit latch are 00000000 (0), pulse 24 is produced. When the contents of the 8-bit latch 30 are 10000000 (128.sub.10), pulse 26 is produced. When the contents of the 8-bit latch 30 are 11000000 (192.sub.10), pulse 28 is produced.
While earlier systems and methods for using multiple bit samples of digital information to produce PWM signals generally have been successful, there have been shortcomings with their use. For example, comparing each bit of a multiple bit sample of digital information with a different system clock signal often requires a relatively large number of clock ticks to process each multiple bit sample of digital information. In the exemplary apparatus 20, for example, one 8-bit sample is processed during each PWM time period T, and 256 clock ticks occur during each PWM time period T. Unfortunately, the use of larger numbers of clock ticks per sample of digital information can decrease the sampling rate. A reduced sampling rate can have disadvantages such as slowing the rate at which digital information can be processed and increasing the level of audible noise in PWM signals used to produce audio signals.
Thus, there has been a need for an apparatus and method that uses fewer clock ticks to produce PWM signals from multiple bit samples of digital information. The present invention meets this need.